1. Field of Invention
The present invention relates to a semiconductor device structure. More particularly, the present invention relates to the pixel structure of a thin film transistor liquid crystal display (TFT-LCD).
2. Description of Related Art
A thin film transistor liquid crystal display (TFT-LCD) typically includes a thin film transistor array substrate, a color filter array substrate and a liquid crystal layer. The thin film transistor array substrate contains numerous pixel structures arranged to form an array. Each pixel structure at least includes a thin film transistor and a corresponding pixel electrode. Each thin film transistor has a gate, a channel layer, a drain and a source. The thin film transistor serves as a switching element for a single liquid crystal display unit.
FIG. 1 is the top view of a conventional pixel structure and FIG. 2 is a sectional view through line I-I″ as shown in FIG. 1. To construct the pixel structure as shown in FIGS. 1 and 2, a gate 102 and a scan line 101 are formed over a substrate 100 such that the scan line 101 and the gate are connected. Thereafter, a gate dielectric layer 104 is formed over the substrate 100 covering the gate 102 and the scan line 101. An amorphous silicon channel layer 106 is next formed over the gate dielectric layer 104 above the gate 102 and then an ohmic contact 108 is formed over the amorphous silicon channel layer 106. Source/drain terminals 112a/112b are formed over the ohmic contact 108 and, at the same time, a data line 111 having connection with the source terminal 112a is patterned out above the gate dielectric layer 104. The gate 102, the channel layer 106, the source/drain terminals 112a/112b together constitute a thin film transistor 130. In a subsequent step, a passivation layer 114 is formed over the substrate 100 covering the thin film transistor 130. The passivation layer 114 is patterned to form an opening 116. Afterwards, a pixel electrode 118 is formed over the passivation layer 114. The pixel electrode 118 is electrically connected to the drain terminal 112b of the thin film transistor 130 through the opening 116.
The aforementioned pixel structure may further include a pixel storage capacitor 120 above a neighboring scan line 101a. The pixel storage capacitor 120 comprises of a scan line 101a (serving as a lower electrode), a conductive layer 124 and a pixel electrode 118 (serving as an upper electrode) above the scan line 101a and the gate dielectric layer 104 between the upper and the lower electrode. The conductive layer 124 and the pixel electrode 118 are electrically connected together through another opening 126 in the passivation layer 114.
Conventionally, the thin film transistor 130 for driving a pixel structure is typically located near one corner while the pixel storage capacitor 120 is over the scan line 101a. With this pixel structure design, pixels are easily contaminated by particles during the fabrication process leading to possible failure. In other words, if contaminating particles adhere to a particular location on the pixel structure to cause a local short circuit, the entire pixel structure may malfunction. Furthermore, the placement of the pixel storage capacitor 120 over the scan line 101a also requires an additional design stage to cater for the scanning waveform. Consequently, both the driving circuit and the fabrication process is more complicated.